Conventionally, in various electronic devices that take in and process analog signals, an analog to digital converter (ADC) has been used to convert an analog signal into a digital signal. This ADC can be classified into various types such as a sequential comparison-type ADC, a pipeline-type ADC, and a delta-sigma modulator. Among these types, a delta-sigma modulator is often used in the fields of audio, measurement, and the like, for reasons such as the structure being simple and quantization noise being easy to reduce.
In general, when a direct-current component of a certain level is input to a delta-sigma modulator, an unnecessary periodic signal called idle tone is output in some cases. This idle tone causes a signal to noise (SN) ratio and total harmonic distortion+noise characteristics to deteriorate. Hence, a delta-sigma modulator has been proposed in which, in a circuit including a preceding-stage integrator and quantizer and a subsequent-stage integrator and quantizer, an adder that applies a dithering signal is disposed between the integrators (e.g., see Patent Literature 1).